1. Field of the Invention
The present invention relates to a switching regulator configured to output a constant voltage, and more specifically, to a circuit configured to suppress an overshoot of an output voltage.
2. Description of the Related Art
A switching regulator is used as a voltage supply source for circuits of various electronic devices. The switching regulator has a function of outputting a constant voltage to an output terminal irrespective of a fluctuation in voltage of an input terminal. The switching regulator is required to output a voltage that is as close as possible to a set voltage of the output terminal even in a region where the voltage of the input terminal has been low and the set voltage cannot be maintained. It is important that, when the voltage of the input terminal recovers from this state to enable the supply of the set voltage value to the output terminal, the voltage of the output terminal transitions to the set voltage without any overshoot. For this reason, clamping of an output voltage of an error amplifier has hitherto been performed.
FIG. 7 is a block diagram illustrating a switching regulator including a clamp circuit.
The related-art switching regulator includes a triangular wave generating circuit 3, an error amplifier 31, a PWM comparator 27, a buffer 6, operational amplifiers 5 and 17, resistors 9, 13, 15, and 25, a capacitor 11, diodes 7 and 19, a reference voltage circuit 23, a power transistor 40, a diode 42, a coil 41, and a capacitor 43.
The reference voltage circuit 23 outputs a reference voltage Vref. The triangular wave generating circuit 3 outputs a triangular wave Vramp oscillating between an upper limit level voltage VH and a lower limit level voltage VL thereof. The error amplifier 31 compares a feedback voltage Vfb of an output voltage Vout of the switching regulator and the reference voltage Vref of the reference voltage circuit 23, and amplifies a difference between those voltages. The PWM comparator 27 compares a voltage Vent output from the error amplifier 31 and the triangular wave Vramp to output a signal Vpwm.
The operational amplifier 5 forming a voltage follower circuit buffers and outputs the triangular wave Vramp. The capacitor 11 is connected to an output terminal of the operational amplifier 5 via the diode 7 and the resistor 9, and hence the upper limit level voltage VH of the triangular wave Vramp is held. The resistors 13 and 15 forming a voltage divider circuit divide the voltage VH held at the capacitor 11 to output a voltage Vclamp. The operational amplifier 17 forming a voltage follower circuit buffers and outputs the voltage Vclamp. The diode 19 has a cathode connected to an output terminal of the operational amplifier 17 and an anode connected to an output terminal of the error amplifier 31 via the resistor 25. The circuits described above form a clamp circuit.
Thus, when a voltage Verr output from the error amplifier 31 reaches the voltage Vclamp, the operational amplifier 17 draws a current to control the voltage Verr so as not to exceed the voltage Vclamp. In other words, the voltage Verr′ of an inverting input terminal of the PWM comparator 27 does not exceed the upper limit level voltage of the triangular wave Vramp being the other voltage input to the PWM comparator 27.
As described above, in the related-art switching regulator, a switching Duty becomes higher as the voltage Verr approaches a high potential side of the triangular wave Vramp. Consequently, even when a high Duty is required due to a low power supply voltage or an excessive load current state, the voltage Verr falls within an amplitude range of the triangular wave Vramp. With this, the voltage Verr can quickly transition to a next operating point when the voltage recovers from the low power supply voltage or when the excessive load current state ends, and hence magnitude of an overshoot occurring in the output voltage Vout can be reduced.
In this manner, the clamp circuit of the related-art switching regulator circuit prevents the excessive overshoot from occurring in the output voltage Vout even when the voltage of the input terminal significantly fluctuates as represented by a cold crank.
However, the related-art switching regulator including the clamp circuit has a disadvantage in that the switching is always performed even when the voltage of the input terminal has been low, and hence a state in which the input terminal and the output terminal are connected in a DC manner (hereinafter referred to as “100% Duty state”), which is required in a step-down switching regulator, cannot be achieved.
When it is assumed that the clamp circuit limits the maximum Duty of the step-down switching regulator to α%, a maximum output voltage Vout(max) corresponds to a value obtained by multiplying a voltage VIN of the input terminal by α. That is, Vout(max)=αVIN holds.
Now, when it is assumed that a set value Vouts of the output voltage Vout is 5 V, the voltage VIN of the input terminal is 4 V, and α is 90%, Vout=4 V×90%=3.6 V holds. Under this condition, the voltage VIN of the input terminal falls below the set value of the output voltage Vout, and hence the 100% Duty, that is, α=100% is essentially desired. A voltage of 4 V is output as Vout if α=100% holds, but the voltage drops by about 0.4 V due to the limitation of α.